11. JTAG Interface Operation

11.3 Bypass Register


The bypass register is 1 bit wide.

When the bypass register is selected and the TAP controller is in the Shift-DR state, data on JTDI is shifted into the bypass register and the output of the bypass register is shifted out onto JTDO.




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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